Thinking about design of the SCD (Switched Capacitor Detector). My initial idea was to use a 74HC4053 with all switch sections in parallel for the switch. After looking at the datasheet it seems that ON-resistance of these devices is 70 ohms per switch. Thus, with all three sections in parallel the ON-resistance would still be in excess of 20 ohms. That seems quite high for a detector that will probably have it's RF input at 50 ohms impedance. Also, the per-switch capacitance of a 74HC4053 is roughly 3.5 pf per section, so the feed-thru capacitance of all gates in parallel when the gates are OFF would be around 10 to 12 pf. Admittedly this will be operating at 500 kHz, but even 11 pf is significant and could cause some signal degradation.
This brings me to the possible option of using a plain old J-FET or MOSFET as the switch mechanism. Since the Antenna input port will be offset to Vcc/2, I can connect the FET as a voltage follower (drain to charge capacitor, base to ground via a 10K or so resistor with VFO input coupling, and source to input RF port). That should provide a better switch mechanism than the 74HC4053. Some experimentation will prove if I an right or wrong.
Hmmm...wonder if you can use two of these switches and charge-capacitors in series and get the combined roll-off effect from both caps. If workable it might be an easy way to make a better LPF function ahead of the audio amplifier.